Doctoral Researcher in Digital Integrated Circuits

Doctoral Researcher in Digital Integrated Circuits

Tiny Systems and Circuits (TSirc) Group | Department of Electronics and Nanoengineering | Aalto University | Espoo, Finland

About Aalto University

Aalto University is where science and art meet technology and business. We shape a sustainable future by making research breakthroughs in and across our disciplines, sparking the game changers of tomorrow, and creating novel solutions to major global challenges. Our community is made up of 16,000 students and 5,200 employees, including 446 professors, based at our campus in Otaniemi, Espoo, in the Greater Helsinki area, Finland.

Diversity is part of who we are, and we actively work to ensure our community's diversity and inclusiveness. We warmly encourage qualified candidates from all backgrounds to join us.

About the Department

The Department of Electronics and Nanoengineering conducts research and delivers courses spanning electromagnetics, micro and nanotechnology, radio engineering, and space technology. Our research groups maintain active national and international collaboration with leading institutes and companies, and work with world-class facilities — including the largest clean rooms in the Nordic countries, located at the Micro- and Nanotechnology Centre Micronova.

About the Role

We are seeking a motivated and talented Doctoral Researcher (PhD Student) to join the Tiny Systems and Circuits (TSirc) group, led by Professor Kwantae Kim. This position is embedded within the HolistIC project, which is developing ultra-low-power system-on-chip (SoC) designs for next-generation intelligent audio IoT sensors.

In this role, you will design the next generation of energy-efficient digital integrated circuits — taking them all the way from RTL to a fabricated chip and PCB, which you will measure in our own dedicated laboratories. This is a hands-on, end-to-end chip design position at the frontier of on-chip AI inference and in-memory computing.

The position follows Aalto's standard 2+2 doctoral contract model: an initial two-year fixed-term contract with a six-month probationary period, extendable by a further two years upon a successful mid-term review, for a total duration of four years. Our primary workplace is the Otaniemi Campus in Espoo, Finland.

Responsibilities

As a Doctoral Researcher, you will:

• Design energy-efficient digital in-memory computing circuits for on-chip AI inference, covering both full-custom design and RTL-based flows through synthesis, place-and-route, and tape-out
• Verify and characterise your designs across the full development pipeline — from simulation and FPGA prototyping through to measurement of fabricated chips in our laboratory
• Publish and present your research findings at leading international conferences and journals
• Complete your doctoral thesis within the Aalto Doctoral Programme in Electrical Engineering
• Contribute to teaching duties as part of your doctoral studies, in accordance with standard doctoral researcher responsibilities
• Collaborate with academic partners across Europe and Asia, with opportunities for research visits abroad

Your Team

The TSirc research group currently consists of one professor, three PhD students, and several MSc and BSc research collaborators. You will join a close-knit, internationally connected team with a clear focus on impactful, application-driven chip design research.

Requirements

We are looking for a thorough and motivated colleague who meets the following criteria:

• Holds a Master's degree with excellent academic records in Electrical Engineering, Electronics, Microelectronics, Computer Engineering, or a closely related field — completed by the start of the position
• Has a solid background in digital hardware design, including Verilog/SystemVerilog RTL, logic synthesis, and place-and-route flows
• Is familiar with Python programming
• Has working professional proficiency in English (Finnish language skills are not required)

The following experience is considered an advantage:

• Experience with FPGA prototyping
• Familiarity with the PyTorch deep learning framework
• Experience with analog or full-custom layout
• Prior tape-out experience in any semiconductor technology node

What We Offer

• Access to a comprehensive suite of industry-standard chip design tools required for tape-out, including Cadence